About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell coherent DSP devices are critical for efficient transmission over fiber-optic networks. At Marvell Coherent DSP Solutions, we design cutting-edge, high-performance integrated circuits that are shipped into the world's top hyper-scale and telecom networks.

You will be part of a highly skilled team involved in the design, simulation, emulation, implementation, and validation of DSP ASICs. Specifically, you will join the area responsible for building and maintaining the emulation platform used across complex chip projects — enabling pre-silicon validation, HW/SW integration, and bring-up support for next-generation coherent DSP chips. This work bridges the gap between RTL design and firmware/software development, accelerating the entire product development cycle.

What You Can Expect

Participate in the development and maintenance of test plans for CDSP projects using dedicated hardware to accelerate simulation workloads

Work alongside senior engineers to learn and contribute to emulation platform optimization

What We're Looking For

Education:

Candidate MUST be pursuing a degree in Electronic Engineering, Computer Science or related technical field(s)

Have less than 5 final exams to graduate or less than one year to finish the career

Technical Knowledge:

Proven experience in C, C++, and Python programming

Knowledge of object-oriented and low-level programming concepts

Familiarity with algorithms and data structures

Basic understanding of HW/SW debugging techniques

Knowledge of Verilog or digital design concepts is a plus

Good English communication skills (verbal and written)

Languages:

English: Advanced

Spanish: Native or fluent

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Embedded System Intern for Pre-Silicon Validation