Basic Qualifications

Education Requirements:

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 10 years of relevant experience; or Master's degree plus a minimum of 8 years of relevant experience.

Clearance Requirements:

Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities for this Position

Duties and Tasks:

Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
Determines architecture, system simulation and detailed design approach
Defines module interfaces and all aspects of device design and simulation
Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
Creates test and simulation plans that establish functional criteria
Verifies test results and analyzes performance
May also review vendor capabilities, foundry technologies, device libraries and simulation tools
May lead or have significant contributions to technical subcontract management for medium to large subcontracts that may include SOW development, proposal evaluation, source selection, technicaloversight, and subcontractor work product evaluation and acceptance
Reviews vendor capability to support product development
Applies an expert understanding of the organizationally defined processes throughout the lifecycle of the program or project
Participates in the development, maintenance and improvement of the ASIC/FPGA organizational processes
Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the development life cycle
Leads the research and analysis of data, such as customer design proposal, specifications, and manuals to determine feasibility of design or application
Selects components and equipment based on analysis of specifications and reliability
May be a book boss on a medium proposal
Establishes the overall ASIC/FPGA technical approach on large technical proposals
May participate in multi-divisional or multi-company Integrated Product Team or working group
May supervise or manage lower level employees
Exercises considerable latitude in determining technical objectives of assignments
Works on advanced applications that may result in new business for the company

Knowledge, Skills and Abilities:

Substantial use and understanding of ASIC/FPGA engineering concepts, principles, and theories
Frequently contributes to the development of innovative principles and ideas
Substantial understanding of company policies and practices
Substantial understanding of ASIC/FPGA engineering processes
Substantial awareness of business objectives and Engineering’s role in achieving
Substantial proficiency in Microsoft Office applications
Substantial written and verbal communications skills
Ability to think creatively
Ability to multi-task
Substantial skill in communicating issues, impacts, and corrective actions
Substantial ability to recognize and clearly report information relevant to sound engineering design
Substantial understanding and ability to apply project leadership principles including SPI/CPI, Earned Value, Cost Account Management (CAM), and Statistical Process Controls
Demonstrated ability to manage scope growth
Frequent contact with all levels across the entire company
Serves as consultant to management and customers on projects and applications
May serve as company technical spokesperson
Works under consultative direction on predetermined long-range objectives
Assignments may be self-initiated
Works on unusually complex problems and provides creative and innovative solutions
May function in a Deputy Program Manager Engineering (DPME) role
Identifies opportunities to apply AI for continuous improvement and innovation

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Salary Note

This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.

Combined Salary Range

USD $191,146.00 - USD $212,053.00 /Yr.

Company Overview

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

Senior Principal ASIC FPGA Engineer